Take a proper reset controller providing a valid reset high signal down to Vcc=0V. Feed this reset signal to the input of an OR-gate (more precisely a negative-AND). Connect the other input to a free port pin emitting high level, whenever you want the outputs be switched off (during power-up e.g.), and feed the output of this OR-gate to the /OE input of 74HC574.

This scheme will work as follows:

As the power-on reset resets the port outputs of a standard 8051 (as your AT89S52) synchronously to high level, it needs a bit time until they actually emit high level. This is caused by the oscillator circuit which needs to have started-up fully before this resetting can be done. Have a look at this plot, which shows the port pin's performance during power-on:



The upper line is Vcc, while the lower line shows the level of port pin. Here, the start-up time is only a few milliseconds, but can durate much longer.

During the first milliseconds where the port pin is undefined the reset signal of reset controller helps to keep the 74HC574 in tristate mode. And after the reset signal has become inactive, the port pin still emitting high level guarantees that the outputs of 74HC574 stay in tristate mode.

Now you have to connect pull-ups or pull-downs at the outputs of 74HC574 to force the bases of your output devices to high resp. low level. This depends on your output devices, of course, whether they turn-on by a high or low level at their inputs.

This scheme also provides a defined performance, when powering down the micro. Then, the reset controller is again emitting high level, putting the outputs of 74HC574 again in tristate mode (by the help of said OR-gate) and by this switching-off the outputs of your output devices.

Kai