| ??? 08/01/12 22:14 Read: times |
#187983 - Perhaps certain CPLD's would do the job Responding to: ???'s previous message |
IIRC, the CoolRunner-II (XILINX) family of CPLD's allows you to feed a separate supply to the I/O cells, while operating the logic at the "usual" voltage (3V3, I believe).
Several of the FPGA families that XILINX produced allowed the same on-chip level translation. Doesn't the family you're using do this? ISTR that several of them, while operating at 1V5 or 1V8, still supported I/O at 3V3. The older Spartan-II family even was 5V0 tolerant. RE |
| Topic | Author | Date |
| CPLD level translators | 01/01/70 00:00 | |
| TI Voltage level translators ? | 01/01/70 00:00 | |
| thanks | 01/01/70 00:00 | |
| Why specifically CPLD? | 01/01/70 00:00 | |
| True | 01/01/70 00:00 | |
| Perhaps certain CPLD's would do the job | 01/01/70 00:00 | |
| Wide Vcc CPLDs sadly rare | 01/01/70 00:00 | |
| forgive my ignorance, but ... | 01/01/70 00:00 | |
| some examples | 01/01/70 00:00 | |
| Same for ARM | 01/01/70 00:00 | |
| some small devices have OCR too | 01/01/70 00:00 | |
| Bigger chips | 01/01/70 00:00 | |
Altera FPGAs | 01/01/70 00:00 |