??? 04/09/11 19:20 Read: times |
#181792 - Latency Time Problem Responding to: ???'s previous message |
If you were using an external SRAM chip that had power gating to its VDD pin I think there would be a long latency involved with re-powering the SRAM dynamically to get a new seed value. SRAMs such as the old 2Kx8 and 8Kx8 that I've used in the past had quite a long time that they would hold their data at power down. I've seen cases where some or most of the data is retained for times approaching a minute or more.
Mike |
Topic | Author | Date |
Truly Random Number Generator | 01/01/70 00:00 | |
Latency Time Problem | 01/01/70 00:00 | |
this is bad | 01/01/70 00:00 | |
Don't think 1:1 mapping | 01/01/70 00:00 | |
understanding | 01/01/70 00:00 | |
Doesn't matter | 01/01/70 00:00 | |
Yeah, yeah!! | 01/01/70 00:00 | |
Way more than 3 | 01/01/70 00:00 | |
baloney | 01/01/70 00:00 | |
So easy to make assumptions and crash and burn | 01/01/70 00:00 | |
Missing the point! | 01/01/70 00:00 | |
Its just soooo wrong | 01/01/70 00:00 | |
Randomness - NOT | 01/01/70 00:00 | |
The key point is | 01/01/70 00:00 | |
Johnson noise versus zener noise... | 01/01/70 00:00 |