??? 08/01/10 22:26 Read: times |
#177563 - No magic ISR advantage for uC in relation to uP Responding to: ???'s previous message |
Comparing a 3GHz processor against a 100MHz controller is not being fair and is similar to comparing apples and oranges. Who is talking about fair? It is a valid comparison showing that a microcontroller isn't automagically faster - the frequency of the processors tends to scale faster than the pipeline length, which was a reason to show an alternative at the outer edge in GHz. Lots of 200MHz-300MHz processors with two or three tick pipeline. Lots of GHz processors with way less than 10 tick pipeline. That there are not too many 20MHz one-clocker microprocessors because there is no need for them. Most times when there is so small needs for computation pwer, it's a device that needs the I/O from a microcontroller. But that is a question of need - not something that separates the interrupt performance of a microprocessor in relation to a microcontroller. The difference between a general-purpose microprocessor and a microcontroller is not the interrupt response time. It's the integration of peripherials. And when it comes to interrupts, a general-purpose processor is normally also given good hw for handling the interrupts, since they may need to handle large numbers of interrupts and time spent in interrupts is time not handling the main tasks. A low-end Gbit NIC may get over 50k packets/second - besides the 50k packets/second you may want to send. If it doesn't support jumbo frames and doesn't have a good FIFO for the packets, the microprocessor has a lot to take care of. A 500Mhz GP with 5 clock pipeline can have same reaction time to enter the ISR - and then continue through the ISR at several times the speed of a 100MHz one-clocker. My example with a 3GHz processor showed that it could be 3 times faster to enter the ISR - if the ISR has to compute something before making an action it will not be just 3 times faster at the compuation step so don't fool yourself into thinking a 100MHz one-clocker comes close when just looking at the time-to-enter time. A 3GHz processor would suffer from memory stalls, but would at the same time be superscalar, doing many instructions/clock cycle making it a fractional-clocker. Another thing - what is an ARM? It is either a general-purpose microprocessor or a microcontroller - it's just up to the manufacturer how they outfit it. The core is does not care if it's part of a microprocessor or a microcontroller. The thing is - a "slow and cheap" GP processor can run with the same pipeline length than a "slow and cheap" microcontroller. A fast GP processor have to add pipeline length but without falling behind in realtime performance since a longer pipeline allows for a higher clock frequency. So I still keep my original claim (the one you didn't agree with): "A microprocessor may be just as good at handling interrupts quickly - after all, the time spent handling an interrupt is time not spent running the main program." Don't count that off as being too practical - it's just a reality. On another note: What do you mean by internal clocks? Lots of processors have RC oscillators - often laser-trimmed so they can be used for UART baudrate too. Or do you mean RTC? Lots of processors have RTC support. |
Topic | Author | Date |
µ-controllers, µ-processors and DSPs | 01/01/70 00:00 | |
No-on last question. | 01/01/70 00:00 | |
early DSP's had no converters | 01/01/70 00:00 | |
Signal Processing | 01/01/70 00:00 | |
Digitial signal processing is mainly math.![]() | 01/01/70 00:00 | |
it's all marketing | 01/01/70 00:00 | |
There really isn't a true distinction anymore. | 01/01/70 00:00 | |
8051 + MAC | 01/01/70 00:00 | |
I know. | 01/01/70 00:00 | |
There is some confusion.... | 01/01/70 00:00 | |
DSP designed for concurrency of simple operations | 01/01/70 00:00 | |
Still some confusion... | 01/01/70 00:00 | |
processor/processing, and absolute time contra clock cycles | 01/01/70 00:00 | |
You're being too practical | 01/01/70 00:00 | |
No magic ISR advantage for uC in relation to uP | 01/01/70 00:00 |