Do look very carefully at what you actually get with the Logic unit. At some level of analysis it is almost a toy. From looking at the tech specs it is clear that this unit does not have very much internal memory. In fact just enough to act as an elastic buffer between the sample rate and the transfers of sample data across the USB cable. This becomes particularly clear when you look at their description of the top sample rate clocking at 24MHz. What they say is that the unit can sample at 24 MHz when it is on a USB2.0 connection and there are no others devices sharing the same host controller. If there is lag in the computer or other processing going on they say right out that the top sample rate may be slower.

I downloaded the software trial to verify something else that I suspected from looking at the web page. The unit only supports internally generated sample clocking. No external clocking is supported, at least from the simplified options selections seen in the software. In my book this is a severe limitation for some applications such as trapping read and/or write data from a parallel bus at one sample per transaction.

It is kind of astounding, with the speeds of SDRAM memory these days (i.e. DDR2 or DDR3) that you would find a unit such as this not taking advantage of those speeds to build a low cost logic analyzer that had deeeeeeeeeep memory and at the same time have that memory right in the pod to support clocking at rates at up to 80 or even 100MHz. Then transfer the data over USB after the trace has been taken.

Some years ago I did a paper design for a Logic Analyzer design that I wanted to consider making into a product. At the time I say the design as a Cypress USB MCU, a DDR memory (two chips run in ping pong to get 2X data storage rate and deep size) and a medium sized FPGA to implement all the real time control of the memory and the trigger logic. That was back in about 2005 and even then my budget estimates showed a profitable product at a sale price of some where between $89 and $119 depending upon if the unit has 1x or 2x RAM chips populated. Project stopped when I ended up moving across the country and started working with Intel.

Michael Karas