| ??? 12/25/09 07:36 Read: times |
#171914 - Re: Look for "STAPL", Altera application notes Responding to: ???'s previous message |
Thanks Richard,
STAPL uses JBC files and internal format of JBC files is not available. Same case for rbf files. I was able to decode Xilinx bit file and transfer it to Spartan II. I want to do the same using Altera's rbf (or some other) file. This will be possible if I get rbf file details. Unfortunately Altera does not publish file format. They have some guidance about JTAG programming in their application note, but I need the file structure. I read somewhere that rbf file has header of 44 bytes at start. My FPGA hardware is not yet ready and I am studying feasibility of this project. It will be a trial and error once I get hardware in hand. Regards, |
| Topic | Author | Date |
| FPGA configuration using JTAG | 01/01/70 00:00 | |
| Don't Altera have guidance on this? | 01/01/70 00:00 | |
| Lots of it! Look for "STAPL" | 01/01/70 00:00 | |
| Re: Look for "STAPL", Altera application notes | 01/01/70 00:00 | |
| Of course ... you could ASK them ... | 01/01/70 00:00 | |
| re: FPGA configuration using JTAG | 01/01/70 00:00 | |
| I'm not sure that's what he wants ... | 01/01/70 00:00 | |
| Yes, that's what I thought! | 01/01/70 00:00 | |
| End-user reprogramming | 01/01/70 00:00 | |
Well ... what they originally recommended ... | 01/01/70 00:00 |