| ??? 09/19/09 01:48 Read: times |
#168978 - I2C memory reset |
I decided to use one AT24C02 to memorize the 'last condition'. With every switching manipulation AT24C02 is written to. After a power failure when it restores again the AT24C02 is read and 'last condition' is restored too acordingly.
Now the problem is: as I go through the datasheets of all such I2C serial memories there is a memory reset in that of AT24C02 which is not present in others. All 24C02 s' are pin to pin replaceable, and as I have decided to use it for a relatively slow SCL (100 KHz), any 24C02 can be substituted. Is memory reset an utter requirement in bus master's firmware? If so please help me with its routine. Flowchart will do. Please Help, I am new to I2C device. Thanks. |
| Topic | Author | Date |
| I2C memory reset | 01/01/70 00:00 | |
| What does the Datasheet tell you | 01/01/70 00:00 | |
| The CODE is here,please guide | 01/01/70 00:00 | |
| What, exactly, did the datasheet tell you? | 01/01/70 00:00 | |
| Link to the Datasheet is here .... | 01/01/70 00:00 | |
| So what is you question? | 01/01/70 00:00 | |
| So the QUESTION is .... | 01/01/70 00:00 | |
| Bus reset to get I2C listeners back to "idle" | 01/01/70 00:00 | |
Thanks to Westermark | 01/01/70 00:00 | |
| adhere to the datasheet of the one you're using | 01/01/70 00:00 | |
| Who don't know this ! | 01/01/70 00:00 | |
| you're being encouraged to do your own thinking | 01/01/70 00:00 |