You can build ANY target defined in your makefile. And you can define a target that builds one or more of any of the targets in that makefile.

For example, I use makefiles to build my FPGAs. There's a target that runs just the synthesizer. There are individual targets for each of the Xilinx fitter tools (mapper, placer, router, timing analyzer, bitgen, PROM formatter). Another target builds the testbench sources.

Still other targets delete temporary files and wipe ALL results, leaving just the sources.

So I can type

$ make all

and it does just that ... it synthesizes, maps, etc and when done I have a .MCS file I can burn into the config EPROM.

If I've run make, then I change a pinout or timing constraint in the .UCF, the next make all will start with the translate, skipping the synthesis, because the UCF is not a dependency of the synthesis process.

And it's the dependency handling that makes Makefiles superior to your simple batch file. You run your batch and it starts everything from scratch every time. Make knows what's been modified and what depends on what, so it can be very smart and save time by not recompiling things that don't need it.

-a