If a naked 100 MIPS 805x type can't do it, then a naked ARM won't do it any better.

You should provide precise specifications, i.e. number of pulses, pulse width, rise time, fall time, rep-rate, tolerable variance from those spec's, etc. if you really want some help. The interaction between your MCU clock rate and the specifics of your desired waveform will probably make quite a difference.

If your desired sample rate (the rate at which these digital signals change) is 4.000 MHz, then synthesizing them with a 31.25 MHz clock rate may prove difficult, despite the high cycle rate. The devil's in the details.

With a fast MCU capable of a 4 MHz serial port data rate, and using the Mode0 serial port, e.g. on the DS89C420, you might be able to get there without external hardware. It looks like a job for a CPLD, though.

RE