Erik,

Considering the ARM is a RISC cpu(just for Andy!) which dictates that the instruction size be fixed length. On the ARM we have an instruction length of 32 bits whereas on the 8051 it is usually 1 or two bytes (4 for mul and div). As you suggest - doing lots of 32 bit adds the ARM will win hands down but in an instruction mix as one would expect in an application, then its anyone's guess. One could do their Ph'd on this vexing question! Nevertheless, for a wet finger in the air style of measurement, a factor of 2-1 would probably prove to be a fair estimate.

Who's willing to take the Pepsi challenge and come up with some more evidence?


For those people who haven't been brainwashed by the Microchip hype - the general description of a RISC style cpu is that:

the instruction size is fixed
large group of registers - no accumulator
instruction executes in one cycle
memory access is limited to load and store

Where does the PIC fail on the above description??