| ??? 10/31/11 14:54 Read: times |
#184484 - Interpreters have an easier life. Responding to: ???'s previous message |
A BASIC interpreter - or any interpreter - have a quite good control of where time is spent. So it can poll the SPI signals between each interpreted instruction.
And if using a ISR with 1kHz frequency, you can run at way more than 47bps while polling. The big problem is with a "normal" program that doesn't make use of a timer ISR and does not stop main loop during the communication. It is hard to figure out the slowest execution paths in the program, i.e. the longest interval you might get between two polls. So it is very hard to debug and find problems. |
| Topic | Author | Date |
| SPI Slave in 89S52 | 01/01/70 00:00 | |
| Get real processor | 01/01/70 00:00 | |
| Topic Author Date | 01/01/70 00:00 | |
| Big problem | 01/01/70 00:00 | |
| Look for a different model | 01/01/70 00:00 | |
| Try 8051 BASCOM | 01/01/70 00:00 | |
| at what speed | 01/01/70 00:00 | |
| Interpreters have an easier life. | 01/01/70 00:00 | |
| Soft SPI speed | 01/01/70 00:00 | |
| But how to combine that loop with a real program? | 01/01/70 00:00 | |
| and more | 01/01/70 00:00 | |
| Software master trivial - slave is not | 01/01/70 00:00 | |
| SPI analysis is made, results? | 01/01/70 00:00 | |
| There _may_ be a solution - but maybe not acceptable | 01/01/70 00:00 | |
| sure, and so what? | 01/01/70 00:00 | |
| SPI at 100Kbps | 01/01/70 00:00 | |
| Still gives puny transfer rate with significant limitations | 01/01/70 00:00 | |
| the answer is | 01/01/70 00:00 | |
| Fully Interlocked Handshaking. | 01/01/70 00:00 | |
Quite common | 01/01/70 00:00 |