??? 01/26/11 23:31 Read: times |
#180831 - getting there Responding to: ???'s previous message |
Tom Piggin said:
within the SCON register SM0 and FE (framing error) bit share the shame bit within the byte One is read-only; the other is write-only. It is quite common for registers (or bits within registers) to have distinct functions for read & write; eg, reading SBUF access the receiver buffer; writing SBUF access the entirely separate transmitter buffer. should I set SM2 when sending an address and disable when sending data No! or should I set TB8 when transmitting an address and clear TB8 when sending data? Yes! Think about it: if you take the UART out of 9-bit mode, then there is no 9th bit - is there?! i.e so the 9th bit indicates whether an address or data is being transmitted Yes, that is exactly what the 9th bit is for! As the book says: An address byte differs from a data byte in that the 9th bit is 1 in an address
byte and 0 in a data byte. |