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???
08/19/10 06:59
Modified:
  08/19/10 07:04

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Msg Score: +1
 +1 Good Answer/Helpful
#178111 - Find out Why
Responding to: ???'s previous message
Praveen Kumar said:
These errors occur 5-10 times in a day.


Praveen - I do believe that you should strive to identify the reason you see the 5-10 times per day error. Error discovery and recovery that you design into a product should be there to cover the cases of things that happen that you have little or no control over.

On the other hand the failures you seem to be describing sound like they are something that you may very well have the ability to ferret out and fix!! I think if I were you that the goal should be to see no errors in the lab test setup environment.

You were asked several questions regarding the multi-drop interface you are trying to use on the RxD path back to the Master controller. (I posted one of them). You did not seem to answer that at all - and I would like to see your response to that as there may be some bus line contention that is buggering your communications.

I'd like to also ask that you put some consideration toward telling us what consideration that you've put toward the TxD signal path from the Master unit down to the multiple slaves. Have you considered all the issues that can affect signal integrity of such a multi-drop line. Have you applied proper termination schemes? Do you have stubs in the wiring path that create reflections and thus increased noise to a level that becomes marginal for communications to proceed reliably?

You know, you probably need to at least instrument up a batch of oscilloscope checks of the bus in operation and check the SI (signal integrity) to make sure that the proper margins are maintained.

Let me relate one type of SI that could be one that leads to occasional failures. If at some point along the bus you have a signal overshoot that causes the serial I/O pin at a microcontroller to pulse down below -0.8V or so this could cause on-chip upset to occur. An upset could cause a momentary misbehavior of the UART in the MCU. It could cause the MCU to fetch wrong code from time to time or it could cause some data read/write to operate incorrectly. Here is a waveform of a signal with a lot of overshoot:



I'd be particularly on the look out for the overshoots that go below the GND level. Years ago I had an 8051 design that failed due to signals going below GND and making the MCU fetch its code incorrectly. After _lots_ of hard work I was able to trace the problem to the signal pin going below GND whenever a relay on the board was switched from its ON state to the OFF state.


Michael Karas





List of 46 messages in thread
TopicAuthorDate
Multiprocessor Communication 8052            01/01/70 00:00      
   missing info            01/01/70 00:00      
      Hardware and slaves placement            01/01/70 00:00      
         How to TriState???            01/01/70 00:00      
            Using Tristate IC in Slave Card            01/01/70 00:00      
               at the receive ...            01/01/70 00:00      
               RE: I think that this IC handles the Tristate situation            01/01/70 00:00      
               then you need to read            01/01/70 00:00      
                  At the Master end            01/01/70 00:00      
                     again, you need a schmitt            01/01/70 00:00      
                        Hysterese            01/01/70 00:00      
                        Re: Thanks...Info about hardware we are using            01/01/70 00:00      
                           how do you know?            01/01/70 00:00      
                              Lowering baud rate            01/01/70 00:00      
                           Really            01/01/70 00:00      
                              Modified the code in Master and Slave            01/01/70 00:00      
                                 Haven't seen full code - slave protocol state fully cleared?            01/01/70 00:00      
                                    Slave protocol code            01/01/70 00:00      
                                       Slave send code fails to synchronize            01/01/70 00:00      
                                          breaking infinite waits in slave acknowledge wait            01/01/70 00:00      
                                       Stop fooling yourself            01/01/70 00:00      
                                          why didn't you before posting updated code            01/01/70 00:00      
                                          How to reset?            01/01/70 00:00      
                                             Hard reset by doing a hard reset.            01/01/70 00:00      
                                          Errors gone            01/01/70 00:00      
                                             But slave still doesn't synchronize with a resend request            01/01/70 00:00      
                                                that is not the way to do it            01/01/70 00:00      
                                                   too late for an edit            01/01/70 00:00      
      Reduced Baud Rate            01/01/70 00:00      
         not surprised            01/01/70 00:00      
            Never reboot for a transfer error            01/01/70 00:00      
               never be an afterthought            01/01/70 00:00      
                  Transfer validation before implementing command processing            01/01/70 00:00      
                     a trick            01/01/70 00:00      
                        address coding example required            01/01/70 00:00      
                           example            01/01/70 00:00      
                        Added "No message" byte            01/01/70 00:00      
                  never be an afterthought: Amen            01/01/70 00:00      
               Slave Recovery in Error            01/01/70 00:00      
                  Find out Why            01/01/70 00:00      
                     absolutely            01/01/70 00:00      
                        worse in the real world            01/01/70 00:00      
                  in addition: rise baudrate            01/01/70 00:00      
               Slaves follow Synchronization            01/01/70 00:00      
   + Error Checking?            01/01/70 00:00      
      It would be smart to assume that a percentage of messages...            01/01/70 00:00      

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