| ??? 03/24/10 13:05 Read: times |
#174470 - Reply Responding to: ???'s previous message |
Andy Neil said:
Does that also include 'C' programming in general? I have a good basic grasp at C for the x86 processors. Andy Neil said:
First, you need to check the Datasheet for the specific chip that you're using; that will tell you whether the EEPROM appears in IDATA or DATA or some other memory space. Note, however, that the EEPROM might not be memory-mapped at all; you might just have to access it via SFRs (Special Function Registers) - as if it were an external device connected to a port. Only the Datasheet for the specific chip can tell you this. Yeah, I started reading about it, but im afraid I may just be over my head... I got really confused with the language...and its mainly explained for assembler language for example: 4-KByte EPROM for boot (3-KByte) and Data (1-KByte) What does "Boot" mean? is that where my software is being written? 32-KByte On-Chip Flash In-System Programming through USB or UART is that some kind of additional memory or something? is it part of the EPROM or some other extension? The 1-Kbyte on-chip EEPROM memory block is located at addresses 0000h to 03FFh of
the ERAM memory space and is selected by setting control bits in the EECON register. A read in the EEPROM memory is done with a MOVX instruction From this I assume I need to do a xdata to 0x0000 to 0x03FF after programming the EECON register (Just do EECON=<value>; ? do I need to clear EECON after I finish with memory operations and wish to resume to regular I/O or can I leave it on as long as the addresses dont collide? ) The number of data written on the page may vary from 1 to 128 bytes (the page size). what is this page and how do I determine its size? Data is written by byte to the column latches as for an external RAM memory. Out of the
11 address bits of the data pointer, the 4 MSBs are used for page selection (row) and 7 are used for byte selection. Between two EEPROM programming sessions, all the addresses in the column latches must stay on the same page, meaning that the 4 MSB must not be changed. dont understand that at all... Are those 11 address bits in the 0x0000 to 0x03FF range? what am I suppose to do with them? Read Data:
The following procedure is used to read the data stored in the EEPROM memory: • Set bit EEE of EECON register • Stretch the MOVX to accommodate the slow access time of the column latch (Set bit M0 of AUXR register) what does it mean to "Stretch" the MOVX? is it just a delay to accommodate for the work time? "EEPL3-0 Programming Launch command bits Write 5Xh followed by AXh to EEPL to launch the programming. what does it mean? what is the purpose of the EEPL pins in the EECON registry? |
| Topic | Author | Date |
| Atmel 89C5131A-UM Internal memory programming | 01/01/70 00:00 | |
| compiler specific | 01/01/70 00:00 | |
| Reply | 01/01/70 00:00 | |
| Sample code? | 01/01/70 00:00 | |
| Timers | 01/01/70 00:00 | |
| Timers Reply | 01/01/70 00:00 | |
| Have you looked at the tutorials yet? | 01/01/70 00:00 | |
| it's all for assembler - but that doesn't matter! | 01/01/70 00:00 | |
| Huge amounts of data | 01/01/70 00:00 | |
| disregard the large numbers | 01/01/70 00:00 | |
| No compiler support for EEPROM | 01/01/70 00:00 | |
| compiler handling the EEPROM transparently | 01/01/70 00:00 | |
| I did not know Keil helper functions. | 01/01/70 00:00 | |
| It's part of the "xdata banking" support | 01/01/70 00:00 | |
Previously, on 8052.com... | 01/01/70 00:00 |