| ??? 06/19/09 19:09 Read: times |
#166263 - P3_3 commonly for ROM and RAM to switch banks? Responding to: ???'s previous message |
> I am using Port pin Port 3^3 commonly for ROM and RAM to shuffle between banks
Is P3_3 directly connected to A16 of SRAM/ROM? Or are some logic gates (using P3_3, PortA15 and possibly A14, A13 as inputs) involved? How does your (expected) memory map look like? ROM (32 common + 2*32 switched) kByte and SRAM 2*64 switched kByte or: ROM (16 common + 2*48 switched) kByte and SRAM (32 common + 2*32 switched) kByte. or something else? If a single bit for the switching is used then flash and SRAM are switched concurrently. So f.e. no xdata access to (the switched part of) SRAM bank 1 data from CODE bank 0. |
| Topic | Author | Date |
| Code and XDatabanking | 01/01/70 00:00 | |
| Manually handle a few large variables? | 01/01/70 00:00 | |
| Code and XDatabanking | 01/01/70 00:00 | |
| You missed the point! | 01/01/70 00:00 | |
| Do you *have* to use an 8051? | 01/01/70 00:00 | |
| Code and XDatabanking | 01/01/70 00:00 | |
| Fair enough, then! | 01/01/70 00:00 | |
| no banking | 01/01/70 00:00 | |
| Cross reference | 01/01/70 00:00 | |
| Verbiage | 01/01/70 00:00 | |
| P3_3 commonly for ROM and RAM to switch banks? | 01/01/70 00:00 | |
| that will not work | 01/01/70 00:00 | |
Interference | 01/01/70 00:00 |