| ??? 01/16/09 05:57 Read: times |
#161542 - EXT int1 failure in LPC764 Responding to: ???'s previous message |
Yes, interrupt 0 has highest priority (1) and interrupt1 lowest (4 )with timer0 and timer1 having priorities 2 and 3.
Software problem is ruled out because even if the program is restarted under this condition reinitialising all the registers, interrupt enables and priorities this interrupt remains disabled until the micro power is turned off and on Thanks Santhi |
| Topic | Author | Date |
| P87LPC764 External Interrupt1 failure | 01/01/70 00:00 | |
| consider software problem | 01/01/70 00:00 | |
| EXT int1 failure in LPC764 | 01/01/70 00:00 | |
| Restarted how | 01/01/70 00:00 | |
| this is no definitive proof | 01/01/70 00:00 | |
| Ext int1 failure - LPC764 | 01/01/70 00:00 | |
| what is flowed? | 01/01/70 00:00 | |
| a comment on Jan's post | 01/01/70 00:00 | |
| Yes, listen to Jan and Erik | 01/01/70 00:00 | |
Shall check on exit thro RET | 01/01/70 00:00 |