??? 08/05/05 16:10 Read: times |
#98882 - Changed last night Responding to: ???'s previous message |
Jan Waclawek said:
It now says (maybe Craig changed meanwhile?): I added some instruction cycle information last night (Thursday). I haven't added any more information this morning. 17 instruction cycles best case (1-bit shift) and 467 instruction cycles, worst-case (31-bit shift).
My question: Does this include the final ret? Yes. By the way, couldn't the unoptimized version be published here, for reference? Sure. I'm going to adjust the 17-best/467-worst to 18-best/468-worst because I was assuming that the number of bits to shift were passed to it in R3 rather than ACC. Since the challenge specifies that it should be received in ACC, I added a MOV R3,A at the beginning which adds one instruction cycle. The unoptimized reference code for the challenge is: Shift: MOV R3,A Loop: CLR C MOV A,R4 RRC A MOV R4,A MOV A,R5 RRC A MOV R5,A MOV A,R6 RRC A MOV R6,A MOV A,R7 RRC A MOV R7,A DJNZ R3,Loop RET Regards, Craig Steiner |
Topic | Author | Date |
Code Challenge operational | 01/01/70 00:00 | |
Questions for current challenge ? | 01/01/70 00:00 | |
Instruction Cycles? | 01/01/70 00:00 | |
best case/worst case | 01/01/70 00:00 | |
how about 30 instructions | 01/01/70 00:00 | |
30 instructions? | 01/01/70 00:00 | |
i did count inside loops | 01/01/70 00:00 | |
Changed last night | 01/01/70 00:00 | |
Tester/Counter | 01/01/70 00:00 | |
Wow! | 01/01/70 00:00 | |
The 3 better solutions | 01/01/70 00:00 | |
Definition of BEST | 01/01/70 00:00 | |
Definition of best | 01/01/70 00:00 | |
Good idea | 01/01/70 00:00 | |
pre tags? | 01/01/70 00:00 | |
Yes | 01/01/70 00:00 | |
A highlight please | 01/01/70 00:00 |