??? 01/28/11 21:16 Read: times |
#180894 - Okay? Responding to: ???'s previous message |
Hi Per,
No artifact at all. Just a consequence... ?!? Rather than chase that rhetorical rabbit, my point is that this phenomenon is not unique to CMOS. Any field effect device will only draw switching current while it is switching (neglecting parasitics, leakage, etc.). Obviously, the more times it switches per second, the more current it will draw. This is why power consumption is proportional to frequency. Of course, as others have pointed out, even in bipolar devices there are parasitic capacitances that must be charged/discharged during switching. Though negligible compared to a typical bipolar steady state current, they can become significant at very low steady state currents and/or very high operating frequencies. But I believe this is beyond the scope of what the OP was asking about. Joe |
Topic | Author | Date |
Current consumption at high frequency | 01/01/70 00:00 | |
School work again | 01/01/70 00:00 | |
In Short | 01/01/70 00:00 | |
CMOS v FET | 01/01/70 00:00 | |
No artifact | 01/01/70 00:00 | |
in the olden days ... | 01/01/70 00:00 | |
Miller capacitance | 01/01/70 00:00 | |
Miller Effect | 01/01/70 00:00 | |
Okay? | 01/01/70 00:00 | |
What rabbit | 01/01/70 00:00 | |
Thanks | 01/01/70 00:00 |