??? 12/06/10 12:19 Read: times |
#179909 - Hidden erase Responding to: ???'s previous message |
For an EEPROM, the erase is normally hidden, so it's just the write time that differs if the cell is ready to be written or if the chip first have to erase the cell before the write.
What does the I2C analyzer say? |
Topic | Author | Date |
I2C EEPROMs, best data sheets? | 01/01/70 00:00 | |
as we are on 8052.com... | 01/01/70 00:00 | |
my first | 01/01/70 00:00 | |
what uC | 01/01/70 00:00 | |
bit-banging I2C master for EEPROMs is trivial | 01/01/70 00:00 | |
yes, the code is trivial, but ... | 01/01/70 00:00 | |
Probably majority units don't suffer from the busy-loops | 01/01/70 00:00 | |
Smart Door Knobs | 01/01/70 00:00 | |
Andy, Michael | 01/01/70 00:00 | |
ADuC7026 | 01/01/70 00:00 | |
WP pin ? | 01/01/70 00:00 | |
It works sometimes | 01/01/70 00:00 | |
Timing - erase? | 01/01/70 00:00 | |
can you givenot enough time? | 01/01/70 00:00 | |
No erase, no abort | 01/01/70 00:00 | |
Hidden erase | 01/01/70 00:00 | |
STOP too short | 01/01/70 00:00 | |
Problem solved (I think) | 01/01/70 00:00 | |
I2C | 01/01/70 00:00 |