| ??? 12/04/10 11:11 Modified: 12/04/10 11:11 Read: times |
#179865 - bit-banging I2C master for EEPROMs is trivial Responding to: ???'s previous message |
Erik Malund said: I would agree if it would not be the trivial case of EEPROMs.
these days it is almost foolish to attempt IIC with a uC that does not have an IIC HW interface. To write a bit-banged master for those is easy as that requires only a limited subset of I2C features (e.g. no clock stretching). JW |
| Topic | Author | Date |
| I2C EEPROMs, best data sheets? | 01/01/70 00:00 | |
| as we are on 8052.com... | 01/01/70 00:00 | |
| my first | 01/01/70 00:00 | |
| what uC | 01/01/70 00:00 | |
| bit-banging I2C master for EEPROMs is trivial | 01/01/70 00:00 | |
| yes, the code is trivial, but ... | 01/01/70 00:00 | |
| Probably majority units don't suffer from the busy-loops | 01/01/70 00:00 | |
| Smart Door Knobs | 01/01/70 00:00 | |
| Andy, Michael | 01/01/70 00:00 | |
| ADuC7026 | 01/01/70 00:00 | |
| WP pin ? | 01/01/70 00:00 | |
| It works sometimes | 01/01/70 00:00 | |
| Timing - erase? | 01/01/70 00:00 | |
| can you givenot enough time? | 01/01/70 00:00 | |
| No erase, no abort | 01/01/70 00:00 | |
| Hidden erase | 01/01/70 00:00 | |
| STOP too short | 01/01/70 00:00 | |
Problem solved (I think) | 01/01/70 00:00 | |
| I2C | 01/01/70 00:00 |