??? 05/23/08 14:46 Read: times |
#155068 - The goal is to minimize the data loss Responding to: ???'s previous message |
and not just to minimize garbage characters.
The signal from the clock switch logic must (1) prevent the MCU from attempting to access external RAM, and (2) stop the traffic on the asynchronous serial channel. It must do those two things within the current clock cycle. Logic can easily respond to an input that blocks MCU access to external RAM. It can easily generate a signal that will switch one or more of the RS232 tags, but which one(s)? Would DTR be the one? An interrupt will sidetrack the MCU for a while, so I'm not worried about that. RE |
Topic | Author | Date |
Asynchronous Serial Port handshake? | 01/01/70 00:00 | |
Question isn\'t quite clear | 01/01/70 00:00 | |
Thie problem is exactly analogous to,,, | 01/01/70 00:00 | |
Protocol? "We don't need no %$#@! protocol!" | 01/01/70 00:00 | |
Good Luck | 01/01/70 00:00 | |
Sorry to step on your toes ... | 01/01/70 00:00 | |
'right now' | 01/01/70 00:00 | |
sounds to be a case for an external UART... | 01/01/70 00:00 | |
RE sounds to be a case for an external UART... | 01/01/70 00:00 | |
double post, ignore | 01/01/70 00:00 | |
It could be none at all ... | 01/01/70 00:00 | |
Switch | 01/01/70 00:00 | |
The goal is to minimize the data loss | 01/01/70 00:00 |