I have a very large BGA part that requires a lot of decoupling capacitors. The large number of power/ground fanout vias from these caps (due to the sheer number of caps) is making routing difficult. I was trying to think of ways to reduce the via count. I've read that via sharing between multiple capacitors on the SAME layer should not be used under any circumstances. However, I've seen no mention of aligning one capacitor on the bottom layer directly underneath an identical capacitor on the top layer and sharing vias to the power planes that way. Anyone know if using that technique should be avoided as well?