| ??? 05/11/07 16:35 Modified: 05/11/07 16:55 Read: times Msg Score: +1 +1 Good Answer/Helpful |
#139069 - this is all obvious, aside from the missing detail Responding to: ???'s previous message |
How do you wind up with six gates if you draw your circuit as four, i.e, what's doing the translation? Who tells you you have six gates?
My point? It may not matter, since the term "gate" is used by the marketing department, but the relevant physical resources are measured in LUT's or macrocells (FPGA or CPLD) and the increased "gate count" may not impact those at all. RE |
| Topic | Author | Date |
| XOR using NAND | 01/01/70 00:00 | |
| Implemented in what? | 01/01/70 00:00 | |
| Its just self study.. | 01/01/70 00:00 | |
| as I said REDRAW IT | 01/01/70 00:00 | |
| Do the algebra! | 01/01/70 00:00 | |
| Got That. | 01/01/70 00:00 | |
| For Future Reference | 01/01/70 00:00 | |
| Thank You! | 01/01/70 00:00 | |
| Back-to-Basics: DeMorgan's Theorem | 01/01/70 00:00 | |
| this is all obvious, aside from the missing detail | 01/01/70 00:00 | |
| Detail provided | 01/01/70 00:00 | |
| confusing ... | 01/01/70 00:00 | |
| I think | 01/01/70 00:00 | |
| I can see that, I guess. | 01/01/70 00:00 | |
| Yes, easily conceivable... | 01/01/70 00:00 | |
| there are many ways to skin a cat | 01/01/70 00:00 | |
| If you trust... | 01/01/70 00:00 | |
| I have some swampland in Florida to sell | 01/01/70 00:00 | |
It's always going to be used ... | 01/01/70 00:00 | |
| Yes, you will hardly find 4 NANDs, in fact | 01/01/70 00:00 | |
| redraw | 01/01/70 00:00 | |
| You must expand some terms... | 01/01/70 00:00 |