I'm interested in the idea of decoding AC-3 data. I haven't been able to find an IC that does this (eg AC-3 stream in and 6 analog channels out) so the only option I can see is DSP or FPGA. All the DSP ref designs I've found cost a TON of money which makes me wonder, how hard is this to do? As an EE, in my mind it should be fairly straight forward. After reading (skimming mostly) the AC-3 spec (http://www.atsc.org/standards/a_52b.pdf) I've realized that it's complicated due to the "bloating" of the spec (it just covers WAY WAY more that I need or am interested in). Ok, that aside you can read it, look at it, and see that with some state machines (that realistically don't need to be terribly complicated...it's a matter of on the fly conditional decoding of headers and packets) you could do this. Has anyone attempted this (obviously not with a '51 :))? I'm interested in doing this in an FPGA and don't see why it can't be done... I guess at the back of my mind the burning question is, if it can be done, why can't I find some guy's personal home page on google where this has already been done! Any thoughts? Thanks,

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