It is a fact, as multiple other posters have stated, that there is a multitude of data missing here to be able to post a real educated answer to your question.

That said however please do note that it is a VERY COMMON issue for folks first working with 8051 type MCUs to make a fundamental mistake in their design that can lead to exactly the problem that you describe.

The common problem is designing the hardware such that the intended port output pin function is designed to drive as an active high signal to activate the attached downwind control circuit. This means that if the software is intended to drive a '1' bit level to the port pin to activate your gate then this could fit the pattern of the common mistake very well. The problem is that port pins on most 8051 type parts will wake up at power up as an input high level pin. Due to the quasi-bi-directional type of pins on these processors the default pin as an input is same as (equivalent to) an output at '1'. In addition the port pins of this type typically have an onboard pullup circuit that tries to make sure that these default input pins do actually pull high.

Your solution, _if_my_guess_at_your_problem_is_correct, is to re-think your circuit design so that it requires a '0' from the port pin to activate the gate open control. This may be provided by adding an inverter, a simple NPN transistor common emitter buffer circuit, or a simple N-FET common source buffer circuit.

There are other ways to fix this type of problem too - all of course aimed at keeping the power-on time / reset state of your MCU from blipping the output pins to "active on" to other circuits on the board.

If this is really your problem do not feel too bad about it. Even I have been caught having this problem multiple times when I first started withing with 8051 type MCUs.

Michael Karas