| ??? 11/30/11 16:43 Read: times |
#184964 - clarification Responding to: ???'s previous message |
The watchdogs are great, but when you run the F120 at Full Tilt Boogie, you find yourself petting the dog more often than you'd like. The timer is 21 bits wide in all of the SiLabs parts I've used, and 21 bits at 98 MHz is 20 ms, so there it is.
clarification: this discussion is not, per se, about watchdogs, but about "reset supervisors" "when you run the F120 at Full Tilt Boogie" well, the number of instruction that can be processed before a WD timeout is the same regardless of clock speed. Erik |
| Topic | Author | Date |
| P89V51RD2 And Flash Magic | 01/01/70 00:00 | |
| please suggest | 01/01/70 00:00 | |
| reset button | 01/01/70 00:00 | |
| Reset Button | 01/01/70 00:00 | |
| reset circuit | 01/01/70 00:00 | |
| That's the fundamental flaw with RC resets! | 01/01/70 00:00 | |
| Use a MAX700 | 01/01/70 00:00 | |
| Rest supervisor | 01/01/70 00:00 | |
| How Many Times | 01/01/70 00:00 | |
| This will continue until ... | 01/01/70 00:00 | |
| Power dip | 01/01/70 00:00 | |
| real, but worse if flash | 01/01/70 00:00 | |
| note, that here the main problem is NOT power related... | 01/01/70 00:00 | |
| Yes | 01/01/70 00:00 | |
| the ultimate joke | 01/01/70 00:00 | |
| SiLabs watchdog | 01/01/70 00:00 | |
| clarification | 01/01/70 00:00 | |
| Beware flash erase time | 01/01/70 00:00 | |
| brownout detection | 01/01/70 00:00 | |
well, | 01/01/70 00:00 | |
| It's not the spec's ... it's the lack of them. | 01/01/70 00:00 | |
| Reset Chip? | 01/01/70 00:00 | |
| Why Ask??? | 01/01/70 00:00 | |
| Thanks | 01/01/70 00:00 | |
| a plethora of possible chips | 01/01/70 00:00 |