Email: Password: Remember Me | Create Account (Free)

Back to Subject List

Old thread has been locked -- no new posts accepted in this thread
???
06/22/09 04:55
Read: times


 
#166324 - volatile + racing condition
Responding to: ???'s previous message
Just a quick note.

Variables shared between an ISR and the main application should be specified volatile, to order the compiler to not cache them.

Another thing - the timer variables are larger than one byte which means that an 8-bit processor is not guaranteed to read them atomically. This can lead to problems when the ISR is decrementing them while you at the same time test if any of them is expired.

If the variable has the value 0x0100, the compiler could pick up the low byte and see that it is zero. Then the ISR could come in and decrement the value to 0x00ff. After the ISR, the generated code could pick up the high byte and check if this one is zero. So depending on which byte order the compiler selects when checking for zero, the application could time out a timer with 255 ticks left.

Another thing here is that since you count down to zero and then assign new values - and turn off the reload interrupt when updating a timer - this solution will not allow the creation of a loop that runs at a fixed frequency. There is always the possibility of a slow time creep, where a 100ms delay may actually become 100, 100, 101, 100, 101, 100, 101, ...

On one hand, I prefer a solution that never ever stops the timer ISR.

On the other hand, timers are scarce, so I think you should do more with your ISR. At the very least, you should let the ISR increment a global "uptime" variable every ms. Possibly also a 1s variable every 1000 interrupts. This would allow your main loop to create long (and exact) delays or to keep track of time.

List of 29 messages in thread
TopicAuthorDate
Pseudo timers make programming delays easy.            01/01/70 00:00      
   volatile + racing condition            01/01/70 00:00      
      slow processors            01/01/70 00:00      
         You beat me to it...            01/01/70 00:00      
      Timers_0.1 available.            01/01/70 00:00      
         SDCC            01/01/70 00:00      
            ISR defining with SDCC            01/01/70 00:00      
               oh, I just read it in the manual            01/01/70 00:00      
                  only conditionally, as #ifdef SDCC            01/01/70 00:00      
               SDCC and ISRs            01/01/70 00:00      
                  Prototyping ISRs            01/01/70 00:00      
                     you can see it as if....            01/01/70 00:00      
                        SDCC Quirk?            01/01/70 00:00      
                           internals of SDCC            01/01/70 00:00      
                     duh            01/01/70 00:00      
         Too quick            01/01/70 00:00      
            I see something else...            01/01/70 00:00      
               That helped.            01/01/70 00:00      
            Oops! Timers_0.2 available.            01/01/70 00:00      
               you persist            01/01/70 00:00      
   Good idea!            01/01/70 00:00      
   atomicity            01/01/70 00:00      
      No            01/01/70 00:00      
         I gladly, click on a link ....            01/01/70 00:00      
            Direct link            01/01/70 00:00      
               that was clearly possible, I wonder why ...            01/01/70 00:00      
               one more thing, now we are digging deep            01/01/70 00:00      

Back to Subject List