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???
02/05/09 11:07
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#162096 - 80ns ?
Responding to: ???'s previous message
Are you sure the DS89C430 can execute setb and clr in one clock cycle? I would expect them to take two cycles on a one-clocker since they are two bytes. And thus the pulse would be 80ns at 25MHz.

List of 16 messages in thread
TopicAuthorDate
what is the signal freuency on all ports of at89c52/51            01/01/70 00:00      
   minimum pule is 1086 nanoseconds.            01/01/70 00:00      
      Buzz!            01/01/70 00:00      
   40ns is a very short time            01/01/70 00:00      
   You need a faster MCU            01/01/70 00:00      
      the fastest '51            01/01/70 00:00      
      80ns ?            01/01/70 00:00      
         Sorry about that ...            01/01/70 00:00      
            Still not known if single pulse or pulse train            01/01/70 00:00      
               Where there's a will ...            01/01/70 00:00      
            Timer or PCA            01/01/70 00:00      
               repeat earlier question with clarity            01/01/70 00:00      
                  Timing can't be discussed when C is involved            01/01/70 00:00      
                  Think about it            01/01/70 00:00      
                     Supplementary question...            01/01/70 00:00      
                        At first blush . . .            01/01/70 00:00      

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