Done memory-mapped I/O with the ADC12048. It can be controlled and send results with two bytes R/W (default mode at power on) using MOVX @R0 (at any address since all chip selects are bit-banged) or put in 13-bit mode and bit-banging nRD & nWR in addition to nCS.
I am curious about multibyte I/O, but can keep the ADC in byte mode and draw a better schematic with address decoder.
You suggested a register on the rising edge of ALE but this ADC when in 13-bit mode needs to be written control words too. What about another 10...16-bit device that does not allow byte access, do you think it can be done with a SPLD to generate 5 controls (LSB nCS; MSB read register nOE, Clk; MSB write register nOE, Clk) and a 74HCT646 or needs two 74HCT574 registers ?