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???
09/15/12 23:03
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#188343 - You're aware that this is a differential DAC, right?
Responding to: ???'s previous message
It might be well to take a look at section 20.2 of the datasheet just to see how this thing differs from what you probably anticipated. It is an ATMEL part, after all.

One "interesting" aspect of this subsystem is that "the ADC clock frequency must always be equal to or less than the system clock frequency during DAC mode to ensure that the buffer is updated before the second cycle." [from the datasheet]

good luck!

RE




List of 4 messages in thread
TopicAuthorDate
AT89LP6440 no dac output            01/01/70 00:00      
   You're aware that this is a differential DAC, right?            01/01/70 00:00      
      TIA and ADC clock speed.            01/01/70 00:00      
   Have you noticed...            01/01/70 00:00      

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