Hi,
for hardwae part you could refer to the Michael Karas circuit given to you before. Here is the link for it.

http://www.8052.com/forum/read.phtml?id=88596

only change is, for my logic you use port (1.0 - 1.3) for rows and port (2.0 - 2.3) for columns.

Logic:
1)set port 1 as all zero's.
2)set port 2 as all one's.
3)check column port (port 2.0 - 2.3) for all one's.
if not true goto 1
4)call 20 msec delay
5)check for key press (port 2 value compared to 00001111)
if not equal then it shows that key is pressed.
so use 20msec delay for debounce.

So, as of now we have detected switch press.

To detect which key was pressed...
gound each bit of port 1 starting from LSB and check whether the switch press is detected.

eg: set port 1 as 11111110.
now check for key press.

if key press is detected for the condition shown in the eg.,then the address of the lookup table that is written corresponding to row 1 is moved to the DPTR(data pointer register)
Then the content of the accumulator is right shifted through carry (see RRC instruction)
Then carry bit is watched (for identifying the location of the key is pressed).
if carry bit is set to zero, then
contents in accumulator is cleared and the contents at the address @A+DPTR is moved to accumulator and is send out through the desired port, say port 0.

Thats all.

Suresh.