| ??? 10/02/12 20:50 Read: times |
#188545 - The answer is chip dependant Responding to: ???'s previous message |
Rosh Infy said:
A timer keeps incrementing itself after every 12 oscillator cycles. So for a 12 MHz crystal it would have incremented 1 million times in a second.
Here's my question. Suppose I'm using Timer 0 as a 16 bit timer, the maximum value it can take attain is 65536 (2^16). And it takes 65. 536 ms (65/1M) to attain this value. So what if was want to generate a delay that's greater than 65 ms? Do I have to wait for it to overflow and then start it all over again? As others hinted this depends on the variant. If we take a recent variant, but still 'standard package' like AT89LP51RB2, we have a set of timers that can * Prescale by /1 to /16, defaults to /12, for obvious reasons. * Divide by 2^16 * The PCA can clock from Timer0 OF, and also Divide by 2^16 So the "Q:Maximum possible delay using Timers ?" answer, in this chip, is (1/SysCLK)*16*2^16*2^16 At 20MHz, that is 3435.973 seconds, no interrupts used. If you relax the question slightly to allow an external wire, so the PCA can clock another timer, then the answer is ~7 years (still no interrupts) :) |
| Topic | Author | Date |
| Maximum possible delay using a Timer | 01/01/70 00:00 | |
| are you sure? | 01/01/70 00:00 | |
| Timer ISR Counter | 01/01/70 00:00 | |
The answer is chip dependant | 01/01/70 00:00 |