??? 06/18/12 15:56 Modified: 06/18/12 15:57 Read: times |
#187772 - The crux is getting the low-level information Responding to: ???'s previous message |
If you want to write a model in VHDL or Verilog, or any other HDL, of an MCU, the first thing you need is a precise and complete set of specifications. I doubt most manufacturers would be willing or able to provide you with that.
I've tried for years to get information from Maxim/Dallas about the serial port timing of the DS89C4x0 series, and the interaction with the interrupt structure. They're not able, whether for technical or policy reasons, to provide that, and use any number of excuses, mostly of the, "We'll get back to you after checking with engineering ..." type. I doubt other chip makers would be any more forthcoming with those low-level details. The most promising path is to go to OpenCores.org and look at the 805x models they have there. Those can be tweaked if need be, in order to match the features of the chip you want to model, thoug I doubt it will result in a precise reflection of what the chip actually does. It might be "close enough" though. Unfortunately, the same applies to the "family" logic that one intends to use. It's easier to work with a CPLD in that context. RE |
Topic | Author | Date |
circuit simulator for 8051 microcontrollers | 01/01/70 00:00 | |
simulation will not tell you ... | 01/01/70 00:00 | |
You'll have a difficult time finding one ... | 01/01/70 00:00 | |
some links | 01/01/70 00:00 | |
Will any of these do what he wants? | 01/01/70 00:00 | |
Is it worth it? | 01/01/70 00:00 | |
The crux is getting the low-level information | 01/01/70 00:00 |