I understand the 8051 only has a single level receive buffer that can have one byte waiting in the buffer while a second byte is shifting into the shift register. However, in the event that I do not read the buffer prior to the stop bit of the second byte being received, does it set an overrun error condition that I have to clear before
I do not know if you need to clear that bit (if it is there) the "old steam driven" '51 did not have such a bit, but many modern derivatives do, typically the bit is found in SSTA. Check the datasheet for your device

Erik