Are you saying you require a buffer that not only drives the input logic level to either 1 or 0, but also senses that the input has gone to a high-impedance state? How, exactly, would you define that high-impedance state, and how would you propose to sense it?

There are buffers that offer a high-impedance output when an output enable pin is driven either high or low, depending on its type, but I know of none that straightforwardly detects a high-impedance state at its logic input. Generally speaking, you must know when you want the output to go to a high-impedance state. If you can provide an output enable, then you can use something like the 74HC125 or 74HC126. Take a look at those two datasheets and then decide whether that is what you want, and make your decision known. That will provide a starting point.

If you want to detect a high-impedance state, you have to define how you would detect it. That may not be so easy.

RE