To close this thread, I'd like to add a few remarks.

First of all, it looks like there's no such test suite for the MCS51, at least not openly available. Otherwise, the people in this forum would know about it.

I may have to build a small test suite myself, so I will share my thoughts in case somebody can catch any obvious flaws.

What I want to do is verify that some MCS51 CPU implementation behaves exactly as an original 8051 would. I only care about the CPU instructions and don't need to test the peripherals. Neither will I test the interrupts for the time being.


The 'test suite' is just a bunch of more or less independent opcode tests:

1:  For each opcode to be tested:
2:      Set MCU in a known state
3:      Execute the opcode or group of opcodes
4:      Check MCU state as changed by the execution

 

I need to test all single opcodes and some groups of opcodes -- for example, to make sure the result of one instruction is available for the next one. Perhaps some 'families' of opcodes can be tested 'in block' using a simple loop, if it does not weaken the test.

In this context, the 'MCU state' should include all of the XRAM and IRAM plus at least all of the SFRs -- excluding the HW control SFRs since the peripherals are not to be tested.
In Zexall, the 'state' has been simplified to just the Z80 registers and the contents of a single memory word, so the test can't catch failures where the CPU changes a memory location it shouldn't change (and yet it has been used to validate some very accurate Z80 simulators).

The test precondition is set up using an assembler macro and the postcondition check is done by computing a CRC on the changed CPU state and comparing with the CRC from the baseline hardware.


All this looks comprehensive enough, PROVIDED that you select the test cases properly, of course. That is, no matter how sophisticated your test scheme is, in the end it all comes down to building a good set of test cases.


Another possibility, which looks simpler, is to just check the test postconditions 'by hand': use a few instructions to check that everything looks OK (PSW looks like it should, target memory address has been updated, whatever).


I mean to run this test on an FPGA and/or on a post-place-and-route simulation of an FPGA design; I want the test suite to be 100% software so I will not use any help from the simulator and/or extra debugging hardware (I mean not as part of the suite). So it might be used on SW simulators eventually.

If someone reads this post months from now and knows of some such test, please reply; chances are that I won't have even started my own yet :)

All hints and corrections will be appreciated.