??? 06/07/11 17:15 Read: times |
#182524 - 8051 core quiz |
Years ago we used to have various quiz-es and puzzles around the '51, and it was fun.
I thought it might be still fun to find out, how much of the '51's core knowledge stuck, especially when most of us have already moved to C and similar HLL and probably forgotten all the nuances and details of the '51 core, especially those which are not THAT important (or completely unimportant at all). So try first answer without having a look into the books, then try to look up the answer. The assumption is that we are talking about a "biblical", original 8051; derivatives might differ mainly in the unimportant details. Please don't spoil the fun for others and don't post answers before Wednesday 12:00GMT (innocent comments and requests for clarification are of course OK). Oh, and honestly, I would not know the answer to the vast majority of those questions without looking them up... Enjoy! :-) Jan Waclawek --- 1. Let's start with something easy. What is the reset value of SP? 2. And what is the reset value of accumulator? 3. And what is the reset value of register R0? 4. We can change value of carry bit in PSW by ADD/ADC/SUBB; MUL/DIV; and the bit instructions explicitly involving C, e.g. CPL C; CLR C; MOV C, bit. How else? 5. There is no DJNZ A, displacement. How can we then use accumulator as a loop counter? 6. What does a set OV flag mean after DIV AB? 7. And what does a set OV flag mean after MUL AB? 8. How do we perform decrement on number in accumulator in packed-BCD arithmetics? 9. How far can we jump forward/backward from the address, where a SJMP instruction is? For example, ORG 0x1234 SJMP how_far_can_it_jump? 10. And what about ORG 0x0FFF AJMP how_far_can_it_jump? 11. If we have an 8051 with 4kB internal code memory (with no code lock set), perform a MOV P0,#0; and then jump to above the 4kB to start executing from external memory, it will execute NOPs (as it will see 00h on P0 when reading in the opcodes) until PC wraps around to 0. That can be used for a fancy software delay. Correct? 12. ALE is pulsing twice per instruction cycle (which lasts 12 oscillator cycles on the "biblical" '51), so we can use it e.g. as a timebase for a device, which needs a clock 6x slower than the '51. Correct? |
Topic | Author | Date |
8051 core quiz | 01/01/70 00:00 | |
quizes are out of fashion these days... | 01/01/70 00:00 | |
I did it.... | 01/01/70 00:00 | |
thanks | 01/01/70 00:00 | |
missed CJNE | 01/01/70 00:00 | |
indeed | 01/01/70 00:00 | |
I guess a quite frequent oversight | 01/01/70 00:00 | |
RE: optimize LJMPs to AJMPs, etc | 01/01/70 00:00 | |
Maybe? | 01/01/70 00:00 | |
caught again! | 01/01/70 00:00 | |
Most common 8051 assembly mistake? | 01/01/70 00:00 | |
Not just 8051? | 01/01/70 00:00 | |
Different assemblers have different probabilities | 01/01/70 00:00 | |
Conceptual & Typographical errors | 01/01/70 00:00 | |
some assemblers do | 01/01/70 00:00 | |
Readability helps | 01/01/70 00:00 | |
99's | 01/01/70 00:00 |