In the second question, you presumably meant "clock going low", as the "normal" idle state is both signals high.

Now the I2C "bible" does not explicitly deal with any of these states (i.e. master continuing transfer after NAK and SCL going low during idle). The first is dealt with as "The master can then [= after NAK] generate either a STOP condition to abort the transfer, or a repeated START condition to start a new transfer." (ch. 3.6). "Spurious" clocks (i.e. SCL low during idle) may occur as the method of "unlocking" a "failed" communication (3.16), although that should not occur unless SDA has been observed unexpectedly LOW by the master.

I would interpret this all as "master should not continue transfer after NAK and should not go low with SCL in idle unless for the "unlocking"; and at the same time, "slave (as well as the eavesdropping device) should be prepared for any of these states and ignore them silently (maybe the snooper should flag it as an error)".

JW