If your P89LV51RD2 is performing as a SLAVE then the SS# pin is needed to select and enable the SPI section to operate a slave cycle. From Page 43 of the NXP Data Sheet:



The SS# pin will not be active in the above mentioned mode if the SPIEN bit of the SPCTL register is a "0".

It is logical to expect that the SS# pin is inactive and not used as an input when the MSTR bit of the SPCTL is set to "1" to enable the master mode.

It seems certain that for the device that runs in slave mode that you will not be able to use the CEX1 pin function as an output from the PCA.

It should be relatively straight forward to test and see if the operation of the CEX1 pin gets disrupted when you program into SPI master mode. Setup a piece of test code on either your eval board or prototype system that initially has SPI disabled but enables the PCA so as to output a waveform out the CEX1 pin. Then have the test code accept an input from some test push button or other manually applied input. Upon detection of the input going active have the program enable master mode SPI and at the same time observe the waveform out the CEX1 output pin. If the signal stops then you know that you will not be able to use CEX1 while SPI is active.

You could go one step further with the above test and enable the SPI into slave mode. Do this to just confirm that SS# pin does indeed become a dedicated input pin and is no longer a CEX1 output.

Michael Karas