An edge-trigged interrupt happens when a signal changes state. After you acknowledge the interrupt, you will not get any more interrupts until you get a state change. Some processors allows you to specify if you want interrupt for low-to-high or high-to-low or both transitions.

A level-trigged interrupt happens as long as the signal is in the active state. Directly you acknowledge and leave the interrupt handler, you will get one more interrupt. Some processors allows you to specify if you want interrupt for high level, low level or both.

Level-trigged interrupts can allow you to have many interrupt sources sharing a single interrupt input on the processr. Either using a wire-or construct, or by external logic "and" or "or" gates. But you must deassert the signal (or deactivate the ISR) before leaving your ISR or your processor will basically hang, just servicing interrupts.