I recently had the need for a fast bit reversing routine, so the first thing I did (of course) was search this site. Of the solutions presented, the best fit for my needs was Peter Dannegger's method:

        MOV     C,ACC.1
        RLC     A
        MOV     ACC.2,C
        MOV     C,ACC.3
        RLC     A
        MOV     ACC.4,C
        MOV     C,ACC.5
        RLC     A
        MOV     ACC.6,C
        SWAP    A
 

As I often do, I started thinking about this code, with a view to improving it. To devise a fully superior version requires either (a) making it faster without making it bigger, or (b) making it smaller without making it slower. After quite a bit of thought, I have come to the conclusion that this code is optimal, and no fully superior version is possible while using classic 8051 timing.

However, recent "accelerated" 8051 devices have modified timing, and the execution time of a lot of instructions is now proportional to the number of bytes in the instruction. This provides a window to improve upon Peter's method, due to the six instances of "MOV C, bit" / "MOV bit, C" which become twice as expensive (time wise) on some recent 8051 cores.

So I present the following segment of code:

        MOV     R7, A
        RL      A
        RL      A
        XRL     A, R7
        ANL     A, #055h
        XRL     A, R7
        RL      A
        MOV     R7, A
        SWAP    A
        XRL     A, R7
        ANL     A, #0CCh
        XRL     A, R7
 

This weighs in at 14 bytes/14*N cycles on a recent core, vs 16 bytes/16*N cycles for Peter's method.