I finally got some answers from Kevin Self at Maxim/Dallas MCU support regarding what is supposed to happen on P2 when executing code from internal code space but occasionally using external memory-mapped resources via MOVX instructions. This is a glaring omission from the datasheet, but I guess I can see why.

Referring to

http://www.8052.com/forum/read/158581

Which was my initial reference to this, I was concerned about when the high address byte changes on P2, with the intention of using the falling edge of P2.7 during ALE to increment a counter that could provide additional addresses.

Further, I was interested in using a '273-type register to catch the static value of P2 at the rising edge of ALE in order to avoid having signals interrupted during that external memory cycle. As I mentioned in that earlier post, the datasheet and user guide fail to make mention of these conditions. However, it turns out that where the datasheet shows the previous cycle's address-MSByte, there could be the content of the P2 output register, too, if the previous cycle isn't an external memory cycle. This implies that the old 805x trick of registering the port outputs with the rising edge of ALE should work well, and that it should work equally well with P0 and P2. What I conclude from what I've been told, now, is that one can use the P0 (with pullup resistors) and P2 pins as output ports and preserve those values in a positive-edge triggered register clocked with ^ALE. That can have a number of useful applications.

Having had no firm spec's from the manufacturer, I had to find other ways of doing this, but I'll still give it a try as soon as there's time.

RE