| ??? 10/03/08 13:49 Read: times |
#158812 - issues Responding to: ???'s previous message |
but Amor is transfixed on using 2051's (perhaps stubborn) and I have tried to advise how much effort and complexity is needed for a SPI slave, without peripheral hardware support on board the micro.
We keep telling him that this is one of the most difficult things to do and he invariably reply "I am a fresh beginner, how do I do this?". For a raw beginner to insist on doing one of the most difficult tasks does seem to indicate that your paranthetic comment is correct. On a side note... Have you ever used mode 0 successfully between two micro's? nope, but the UART in all kinds of modes other than 0 between multiple processors (you need no transciever when the chips are on the same board). This leads to a possible solution for the OP: does it have to be SPI, can't you just use the UARTS (in mode 1,2 or 3) which will be quite simple Erik |
| Topic | Author | Date |
| SPI slave | 01/01/70 00:00 | |
| high speed? | 01/01/70 00:00 | |
| sory for late replay. | 01/01/70 00:00 | |
| SPI clock | 01/01/70 00:00 | |
| not sure.. | 01/01/70 00:00 | |
| the worst possible approach | 01/01/70 00:00 | |
| SPI Slave Response | 01/01/70 00:00 | |
| further explanation? | 01/01/70 00:00 | |
| Fixed speed | 01/01/70 00:00 | |
| SPI Timing Diagrams | 01/01/70 00:00 | |
| UART Mode 0 - SPI like Serial Shif register | 01/01/70 00:00 | |
| uhm | 01/01/70 00:00 | |
| to joe | 01/01/70 00:00 | |
| your point? | 01/01/70 00:00 | |
| you can't fail with software master | 01/01/70 00:00 | |
| Unanswerable! | 01/01/70 00:00 | |
| really? | 01/01/70 00:00 | |
| Intended for/usable for not always identical | 01/01/70 00:00 | |
| consideration? | 01/01/70 00:00 | |
| Some Questions | 01/01/70 00:00 | |
| whichever you choose | 01/01/70 00:00 | |
| low cost? | 01/01/70 00:00 | |
| if you do not use an interrupt | 01/01/70 00:00 | |
| polling? | 01/01/70 00:00 | |
| bits/s not packet size | 01/01/70 00:00 | |
| speed? | 01/01/70 00:00 | |
| bits/s not packet size! | 01/01/70 00:00 | |
| 500ms? | 01/01/70 00:00 | |
| here | 01/01/70 00:00 | |
| Yes - I agree | 01/01/70 00:00 | |
| issues | 01/01/70 00:00 | |
| UART! | 01/01/70 00:00 | |
| Not complex - just requiring low baudrate | 01/01/70 00:00 | |
| kind of rcorrect | 01/01/70 00:00 | |
| Complexity contra recommendable | 01/01/70 00:00 | |
| answer | 01/01/70 00:00 | |
| as i said | 01/01/70 00:00 | |
| lots of them | 01/01/70 00:00 | |
mcu with spi, right here in the thread | 01/01/70 00:00 | |
| CodeArchitect. ? | 01/01/70 00:00 | |
| no | 01/01/70 00:00 | |
| ahhh | 01/01/70 00:00 | |
| simulating SS? | 01/01/70 00:00 | |
| Interrupts are slower than tight polling | 01/01/70 00:00 | |
| wow | 01/01/70 00:00 | |
| all about worst-case | 01/01/70 00:00 | |
| thanks... | 01/01/70 00:00 | |
| missed interrupts | 01/01/70 00:00 | |
| correct me.. | 01/01/70 00:00 | |
| Fast interrupts | 01/01/70 00:00 | |
| thanks... | 01/01/70 00:00 | |
| An Alternative... | 01/01/70 00:00 | |
| Some Descriptive Information | 01/01/70 00:00 | |
| AT89LP2052 has HW SPI | 01/01/70 00:00 |